The use of FinFETs is very attractive for manufacturing for increasing the density and electrical characteristics of MOS transistors. The fin rises above a substrate to function as the channel so that a major portion of the transistor is vertical and not lateral. The channel direction is lateral but in a structure that is above the surface of the substrate. One of the difficulties, however, has been the ability to adjust the current drive of the transistors, especially to increase the current drive. In a lateral transistor, the current drive is easily adjusted by altering the channel width. One way to increase the channel width is to increase the fin height, but that is generally not practical because the fin height is generally selected to the maximum practical height and the difficulties with the methods that are able to alter fin heights. The generally accepted way to increase current drive is to use more than one fin. Thus, an increase in channel width is conveniently available only in increments of the fin height and requires additional space for each additional fin. The space between fins is desirably small but how small is limited by the pitch limitations of the lithography.
For some of the same reasons, FinFETs have difficulty in being designed into memory arrays. Memory arrays in particular must be laid out efficiently. This begins with having a compact memory cell. This is particularly difficult with FinFETs because of the difficulty in FinFETs providing the different drive needs with an efficient use of space.
Thus, there is a need for a technique for providing a more manufacturable FinFET with adjustable current drive, and preferably without having to be in increments of the fin height. Further the FinFets should provide sufficiently flexibility for efficient layout in a memory array.